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SLX Plugin for Vitis HLS

The SLX Plugin is the first commercially available add-on for Xilinx’s Vitis Unified Software Platform.

Designed to expand the capabilities of the Vitis HLS tool, Silexica’s plugin enables the addition of new pragmas and compiler optimizations when designing for FPGAs using high-level synthesis (HLS).


The SLX Plugin includes:
  • The new Loop Interchange pragma, the first of many planned pragmas from Silexica that provide automatic loop transformations.

  • Several automatic compiler transformations that complement Vitis HLS transformations for improved performance.


Here is a sample of results by inserting the new Loop Interchange pragma. These design
examples are included with the download of the SLX Plugin for Vitis HLS.




The SLX Plugin is an add-on to the Vitis HLS compiler. New pragmas provided with the SLX Plugin can be added manually or by using SLX FPGA 2020.4 , which supports automatic optimization and insertions of these pragmas. The SLX Plugin is supported with Vitis HLS 2020.2 on Linux.




This project has received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement No 858051.